Datasheet

Break Module Registers
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor 131
15.4 Break Module Registers
These registers control and monitor operation of the break module:
• Break status and control register (BRKSCR)
• Break address register high (BRKH)
• Break address register low (BRKL)
• Break status register (BSR)
• Break flag control register (BFCR)
15.4.1 Break Status and Control Register (BRKSCR)
The break status and control register contains break module enable and status bits.
BRKE — Break Enable Bit
This read/write bit enables breaks on break address register matches. Clear BRKE by writing a zero
to bit 7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled
BRKA — Break Active Bit
This read/write status and control bit is set when a break address match occurs. Writing a one to BRKA
generates a break interrupt. Clear BRKA by writing a zero to it before exiting the break routine. Reset
clears the BRKA bit.
1 = Break address match
0 = No break address match
Address: $FE0E
Bit 7654321Bit 0
Read:
BRKE BRKA
000000
Write:
Reset:00000000
= Unimplemented
Figure 15-3. Break Status and Control Register (BRKSCR)