Datasheet

Table 21. Flash command timing specifications (continued)
Symbol Description Min. Typ. Max. Unit Notes
t
swapx01
t
swapx02
t
swapx04
t
swapx08
Swap Control execution time
• control code 0x01
• control code 0x02
• control code 0x04
• control code 0x08
—
—
—
—
200
70
70
—
—
150
150
30
μs
μs
μs
μs
1. Assumes 25 MHz flash clock frequency.
2. Maximum times for erase parameters based on expectations at cycling end-of-life.
6.4.1.3 Flash high voltage current behaviors
Table 22. Flash high voltage current behaviors
Symbol Description Min. Typ. Max. Unit
I
DD_PGM
Average current adder during high voltage
flash programming operation
— 2.5 6.0 mA
I
DD_ERS
Average current adder during high voltage
flash erase operation
— 1.5 4.0 mA
6.4.1.4 Reliability specifications
Table 23. NVM reliability specifications
Symbol Description Min. Typ.
1
Max. Unit Notes
Program Flash
t
nvmretp10k
Data retention after up to 10 K cycles 5 50 — years
t
nvmretp1k
Data retention after up to 1 K cycles 20 100 — years
n
nvmcycp
Cycling endurance 10 K 50 K — cycles 2
1. Typical data retention values are based on measured response accelerated at high temperature and derated to a constant
25°C use profile. Engineering Bulletin EB618 does not apply to this technology. Typical endurance defined in Engineering
Bulletin EB619.
2. Cycling endurance represents number of program/erase cycles at -40°C ≤ T
j
≤ 125°C.
6.4.2 EzPort Switching Specifications
Table 24. EzPort switching specifications
Num Description Min. Max. Unit
Operating voltage 1.71 3.6 V
EP1 EZP_CK frequency of operation (all commands except
READ)
— f
SYS
/2 MHz
Table continues on the next page...
Peripheral operating requirements and behaviors
K10 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
32 Freescale Semiconductor, Inc.