Datasheet

2. Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board.
3. Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
4. Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
6 Peripheral operating requirements and behaviors
6.1 Core modules
6.1.1 Debug trace timing specifications
Table 12. Debug trace operating behaviors
Symbol Description Min. Max. Unit
T
cyc
Clock period Frequency dependent MHz
T
wl
Low pulse width 2 — ns
T
wh
High pulse width 2 — ns
T
r
Clock and data rise time — 3 ns
T
f
Clock and data fall time — 3 ns
T
s
Data setup 3 — ns
T
h
Data hold 2 — ns
Figure 3. TRACE_CLKOUT specifications
Th
Ts Ts
Th
TRACE_CLKOUT
TRACE_D[3:0]
Figure 4. Trace data specifications
Peripheral operating requirements and behaviors
K10 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
22 Freescale Semiconductor, Inc.