Datasheet
144
LQFP
144
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
7 E3 PTE4/
LLWU_P2
DISABLED PTE4/
LLWU_P2
SPI1_PCS0 UART3_TX SDHC0_D3
8 E2 PTE5 DISABLED PTE5 SPI1_PCS2 UART3_RX SDHC0_D2
9 E1 PTE6 DISABLED PTE6 SPI1_PCS3 UART3_CTS_
b
I2S0_MCLK I2S0_CLKIN
10 F4 PTE7 DISABLED PTE7 UART3_RTS_
b
I2S0_RXD
11 F3 PTE8 DISABLED PTE8 UART5_TX I2S0_RX_FS
12 F2 PTE9 DISABLED PTE9 UART5_RX I2S0_RX_
BCLK
13 F1 PTE10 DISABLED PTE10 UART5_CTS_
b
I2S0_TXD
14 G4 PTE11 DISABLED PTE11 UART5_RTS_
b
I2S0_TX_FS
15 G3 PTE12 DISABLED PTE12 I2S0_TX_
BCLK
16 E6 VDD VDD VDD
17 F7 VSS VSS VSS
18 H1 PTE16 ADC0_SE4a ADC0_SE4a PTE16 SPI0_PCS0 UART2_TX FTM_CLKIN0 FTM0_FLT3
19 H2 PTE17 ADC0_SE5a ADC0_SE5a PTE17 SPI0_SCK UART2_RX FTM_CLKIN1 LPT0_ALT3
20 G1 PTE18 ADC0_SE6a ADC0_SE6a PTE18 SPI0_SOUT UART2_CTS_
b
I2C0_SDA
21 G2 PTE19 ADC0_SE7a ADC0_SE7a PTE19 SPI0_SIN UART2_RTS_
b
I2C0_SCL
22 H3 VSS VSS VSS
23 J1 ADC0_DP1 ADC0_DP1 ADC0_DP1
24 J2 ADC0_DM1 ADC0_DM1 ADC0_DM1
25 K1 ADC1_DP1 ADC1_DP1 ADC1_DP1
26 K2 ADC1_DM1 ADC1_DM1 ADC1_DM1
27 L1 PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
28 L2 PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
29 M1 PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
30 M2 PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
31 H5 VDDA VDDA VDDA
32 G5 VREFH VREFH VREFH
33 G6 VREFL VREFL VREFL
34 H6 VSSA VSSA VSSA
Pinout
K10 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
62 Freescale Semiconductor, Inc.
