Datasheet
144
LQFP
144
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
35 K3 ADC1_SE16/
CMP2_IN2/
ADC0_SE22
ADC1_SE16/
CMP2_IN2/
ADC0_SE22
ADC1_SE16/
CMP2_IN2/
ADC0_SE22
36 J3 ADC0_SE16/
CMP1_IN2/
ADC0_SE21
ADC0_SE16/
CMP1_IN2/
ADC0_SE21
ADC0_SE16/
CMP1_IN2/
ADC0_SE21
37 M3 VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
38 L3 DAC0_OUT/
CMP1_IN3/
ADC0_SE23
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
39 L4 DAC1_OUT/
CMP2_IN3/
ADC1_SE23
DAC1_OUT/
CMP2_IN3/
ADC1_SE23
DAC1_OUT/
CMP2_IN3/
ADC1_SE23
40 M7 XTAL32 XTAL32 XTAL32
41 M6 EXTAL32 EXTAL32 EXTAL32
42 L6 VBAT VBAT VBAT
43 — VDD VDD VDD
44 — VSS VSS VSS
45 M4 PTE24 ADC0_SE17 ADC0_SE17 PTE24 CAN1_TX UART4_TX EWM_OUT_b
46 K5 PTE25 ADC0_SE18 ADC0_SE18 PTE25 CAN1_RX UART4_RX EWM_IN
47 K4 PTE26 DISABLED PTE26 UART4_CTS_
b
RTC_CLKOUT
48 J4 PTE27 DISABLED PTE27 UART4_RTS_
b
49 H4 PTE28 DISABLED PTE28
50 J5 PTA0 JTAG_TCLK/
SWD_CLK/
EZP_CLK
TSI0_CH1 PTA0 UART0_CTS_
b
FTM0_CH5 JTAG_TCLK/
SWD_CLK
EZP_CLK
51 J6 PTA1 JTAG_TDI/
EZP_DI
TSI0_CH2 PTA1 UART0_RX FTM0_CH6 JTAG_TDI EZP_DI
52 K6 PTA2 JTAG_TDO/
TRACE_SWO/
EZP_DO
TSI0_CH3 PTA2 UART0_TX FTM0_CH7 JTAG_TDO/
TRACE_SWO
EZP_DO
53 K7 PTA3 JTAG_TMS/
SWD_DIO
TSI0_CH4 PTA3 UART0_RTS_
b
FTM0_CH0 JTAG_TMS/
SWD_DIO
54 L7 PTA4/
LLWU_P3
NMI_b/
EZP_CS_b
TSI0_CH5 PTA4/
LLWU_P3
FTM0_CH1 NMI_b EZP_CS_b
55 M8 PTA5 DISABLED PTA5 FTM0_CH2 CMP2_OUT I2S0_RX_
BCLK
JTAG_TRST
56 E7 VDD VDD VDD
57 G7 VSS VSS VSS
58 J7 PTA6 DISABLED PTA6 FTM0_CH3 TRACE_
CLKOUT
59 J8 PTA7 ADC0_SE10 ADC0_SE10 PTA7 FTM0_CH4 TRACE_D3
Pinout
K10 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
Freescale Semiconductor, Inc. 63
