Datasheet

144
LQFP
144
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
60 K8 PTA8 ADC0_SE11 ADC0_SE11 PTA8 FTM1_CH0 FTM1_QD_
PHA
TRACE_D2
61 L8 PTA9 DISABLED PTA9 FTM1_CH1 FTM1_QD_
PHB
TRACE_D1
62 M9 PTA10 DISABLED PTA10 FTM2_CH0 FTM2_QD_
PHA
TRACE_D0
63 L9 PTA11 DISABLED PTA11 FTM2_CH1 FTM2_QD_
PHB
64 K9 PTA12 CMP2_IN0 CMP2_IN0 PTA12 CAN0_TX FTM1_CH0 I2S0_TXD FTM1_QD_
PHA
65 J9 PTA13/
LLWU_P4
CMP2_IN1 CMP2_IN1 PTA13/
LLWU_P4
CAN0_RX FTM1_CH1 I2S0_TX_FS FTM1_QD_
PHB
66 L10 PTA14 DISABLED PTA14 SPI0_PCS0 UART0_TX I2S0_TX_
BCLK
67 L11 PTA15 DISABLED PTA15 SPI0_SCK UART0_RX I2S0_RXD
68 K10 PTA16 DISABLED PTA16 SPI0_SOUT UART0_CTS_
b
I2S0_RX_FS
69 K11 PTA17 ADC1_SE17 ADC1_SE17 PTA17 SPI0_SIN UART0_RTS_
b
I2S0_MCLK I2S0_CLKIN
70 E8 VDD VDD VDD
71 G8 VSS VSS VSS
72 M12 PTA18 EXTAL EXTAL PTA18 FTM0_FLT2 FTM_CLKIN0
73 M11 PTA19 XTAL XTAL PTA19 FTM1_FLT0 FTM_CLKIN1 LPT0_ALT1
74 L12 RESET_b RESET_b RESET_b
75 K12 PTA24 DISABLED PTA24 FB_A29
76 J12 PTA25 DISABLED PTA25 FB_A28
77 J11 PTA26 DISABLED PTA26 FB_A27
78 J10 PTA27 DISABLED PTA27 FB_A26
79 H12 PTA28 DISABLED PTA28 FB_A25
80 H11 PTA29 DISABLED PTA29 FB_A24
81 H10 PTB0/
LLWU_P5
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
PTB0/
LLWU_P5
I2C0_SCL FTM1_CH0 FTM1_QD_
PHA
82 H9 PTB1 ADC0_SE9/
ADC1_SE9/
TSI0_CH6
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
PTB1 I2C0_SDA FTM1_CH1 FTM1_QD_
PHB
83 G12 PTB2 ADC0_SE12/
TSI0_CH7
ADC0_SE12/
TSI0_CH7
PTB2 I2C0_SCL UART0_RTS_
b
FTM0_FLT3
84 G11 PTB3 ADC0_SE13/
TSI0_CH8
ADC0_SE13/
TSI0_CH8
PTB3 I2C0_SDA UART0_CTS_
b
FTM0_FLT0
85 G10 PTB4 ADC1_SE10 ADC1_SE10 PTB4 FTM1_FLT0
86 G9 PTB5 ADC1_SE11 ADC1_SE11 PTB5 FTM2_FLT0
87 F12 PTB6 ADC1_SE12 ADC1_SE12 PTB6 FB_AD23
88 F11 PTB7 ADC1_SE13 ADC1_SE13 PTB7 FB_AD22
Pinout
K10 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
64 Freescale Semiconductor, Inc.