Information

CMT_CMD3 field descriptions
Field Description
7–0
SB[15:8]
These bits control the upper space periods of the modulator for all modes.
40.6.10 CMT Modulator Data Register Space Low (CMT_CMD4)
The contents of this register are transferred to the space period register upon the
completion of a modulation period.
Address: CMT_CMD4 is 4006_2000h base + 9h offset = 4006_2009h
Bit 7 6 5 4 3 2 1 0
Read
SB[7:0]
Write
Reset
x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
CMT_CMD4 field descriptions
Field Description
7–0
SB[7:0]
These bits control the lower space periods of the modulator for all modes.
40.6.11 CMT Primary Prescaler Register (CMT_PPS)
This register is used to set the primary prescaler bits (PPSDIV).
Address: CMT_PPS is 4006_2000h base + Ah offset = 4006_200Ah
Bit 7 6 5 4 3 2 1 0
Read 0
PPSDIV
Write
Reset
0 0 0 0 0 0 0 0
CMT_PPS field descriptions
Field Description
7–4
Reserved
This read-only field is reserved and always has the value zero.
3–0
PPSDIV
Primary Prescaler Divider
Table continues on the next page...
Chapter 40 Carrier Modulator Transmitter (CMT)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1047