Information

41.2.7 RTC Lock Register (RTC_LR)
Address: RTC_LR is 4003_D000h base + 18h offset = 4003_D018h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 1
LRL
SRL
CRL
TCL
1
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
RTC_LR field descriptions
Field Description
31–8
Reserved
This read-only field is reserved and always has the value zero.
7
Reserved
This read-only field is reserved and always has the value one.
6
LRL
Lock Register Lock
Once cleared, this bit can only be set by VBAT POR or software reset.
0 Lock register is locked and writes are ignored.
1 Lock register is not locked and writes complete as normal.
5
SRL
Status Register Lock
Once cleared, this bit can only be set by VBAT POR or software reset.
0 Status register is locked and writes are ignored.
1 Status register is not locked and writes complete as normal.
4
CRL
Control Register Lock
Once cleared, this bit can only be set by VBAT POR.
0 Control register is locked and writes are ignored.
1 Control register is not locked and writes complete as normal.
3
TCL
Time Compensation Lock
Once cleared, this bit can only be set by VBAT POR or software reset.
0 Time compensation register is locked and writes are ignored.
1 Time compensation register is not locked and writes complete as normal.
2–0
Reserved
This read-only field is reserved and always has the value one.
Chapter 41 Real Time Clock (RTC)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1067