Information

RTC_RAR field descriptions (continued)
Field Description
4
CRR
Control Register Read
Once cleared, this bit is only set by system reset. It is not affected by VBAT POR or software reset.
0 Reads to the control register are ignored.
1 Reads to the control register complete as normal.
3
TCRR
Time Compensation Register Read
Once cleared, this bit is only set by system reset. It is not affected by VBAT POR or software reset
0 Reads to the time compensation register are ignored.
1 Reads to the time compensation register complete as normal.
2
TARR
Time Alarm Register Read
Once cleared, this bit is only set by system reset. It is not affected by VBAT POR or software reset.
0 Reads to the time alarm register are ignored.
1 Reads to the time alarm register complete as normal.
1
TPRR
Time Prescaler Register Read
Once cleared, this bit is only set by system reset. It is not affected by VBAT POR or software reset.
0 Reads to the time prescaler register are ignored.
1 Reads to the time prescaler register complete as normal.
0
TSRR
Time Seconds Register Read
Once cleared, this bit is only set by system reset. It is not affected by VBAT POR or software reset.
0 Reads to the time seconds register are ignored.
1 Reads to the time seconds register complete as normal.
41.3 Functional description
41.3.1 Power, clocking and reset
The RTC is an always powered block that is powered by the battery power supply
(VBAT). The battery power supply ensures that the RTC registers retain their state during
chip power-down and that the RTC time counter remains operational.
The time counter within the RTC is clocked by a 32.768 kHz clock and can supply this
clock to other peripherals. The 32.768 kHz clock can only be sourced from an external
crystal using the oscillator that is part of the RTC module.
Chapter 41 Real Time Clock (RTC)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1071