Information

Table 42-116. Matching Architecture
Structure SMB[RTR] CTRL2[RRS] CTRL2[EAC
EN]
MB[IDE] MB[RTR] MB[ID
1
] MB[CODE]
Mailbox 0 - 0 cmp
2
no_cmp
3
cmp_msk
4
EMPTY or
FULL or
OVERRUN
Mailbox 0 - 1 cmp_msk cmp_msk cmp_msk EMPTY or
FULL or
OVERRUN
Mailbox 1 0 - cmp no_cmp cmp RANSWER
Mailbox 1 1 0 cmp no_cmp cmp_msk EMPTY or
FULL or
OVERRUN
Mailbox 1 1 1 cmp_msk cmp_msk cmp_msk EMPTY or
FULL or
OVERRUN
FIFO
5
- - - cmp_msk cmp_msk cmp_msk -
1. For Mailbox structure, If SMB[IDE] is asserted, the ID is 29 bits (ID Standard + ID Extended). If SMB[IDE] is negated, the
ID is only 11 bits (ID Standard). For FIFO structure, the ID depends on IDAM.
2. cmp: Compares the SMB contents with the MB contents regardless the masks.
3. no_cmp: The SMB contents are not compared with the MB contents
4. cmp_msk: Compares the SMB contents with MB contents taking into account the masks.
5. SMB[IDE] and SMB[RTR] are not taken into account when IDAM is type C.
A reception structure is free-to-receive when any of the following conditions is satisfied:
• the CODE field of the Mailbox is EMPTY;
• the CODE field of the Mailbox is either FULL or OVERRUN and it has already been
serviced (the C/S word was read by the CPU and unlocked as described in Message
Buffer Lock Mechanism);
• the CODE field of the Mailbox is either FULL or OVERRUN and a inactivation (see
Message Buffer Inactivation) is performed;
• the Rx FIFO is not full.
The scan order for Mailboxes and Rx FIFO is from the matching element with lowest
number to the higher ones.
The matching winner search for Mailboxes is affected by the MCR[IRMQ] bit. If it is
negated the matching winner is the first matched Mailbox regardless if it is free-to-
receive or not. If it is asserted, the matching winner is selected according to the priority
below:
1. the first free-to-receive matched Mailbox;
2. the last non free-to-receive matched Mailbox.
It is possible to select the priority of scan between Mailboxes and Rx FIFO by the
CTRL2[MRP] bit.
Chapter 42 CAN (FlexCAN)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1135