Information

SPIx_CTARn field descriptions (continued)
Field Description
Table 43-33. Delay Scaler Encoding (continued)
Field Value Delay Scaler Value
1110 32768
1111 65536
Refer PCS to SCK Delay (t
CSC
) for more details.
11–8
ASC
After SCK Delay Scaler
Selects the scaler value for the After SCK Delay. This field is used only in master mode. The After SCK
Delay is the delay between the last edge of SCK and the negation of PCS. The delay is a multiple of the
system clock period, and it is computed according to the following equation:
t
ASC
= (1/f
SYS
) x PASC x ASC
See Delay Scaler Encoding table in CTARn[CSSCK] bit field description for scaler values. Refer After
SCK Delay (t
ASC
) for more details.
7–4
DT
Delay After Transfer Scaler
Selects the Delay after Transfer Scaler. This field is used only in master mode. The Delay after Transfer is
the time between the negation of the PCS signal at the end of a frame and the assertion of PCS at the
beginning of the next frame.
In the Continuous Serial Communications Clock operation, the DT value is fixed to one SCK clock period,
The Delay after Transfer is a multiple of the system clock period, and it is computed according to the
following equation:
t
DT
= (1/f
SYS
) x PDT x DT
See Delay Scaler Encoding table in CTARn[CSSCK] bit field description for scaler values.
3–0
BR
Baud Rate Scaler
Selects the scaler value for the baud rate. This field is used only in master mode. The prescaled system
clock is divided by the Baud Rate Scaler to generate the frequency of the SCK. The baud rate is
computed according to the following equation:
SCK baud rate = (f
SYS
/PBR) x [(1+DBR)/BR]
The following table lists the baud rate scaler values.
Table 43-34. DSPI Baud Rate Scaler
CTARn[BR] Baud Rate Scaler Value
0000 2
0001 4
0010 6
0011 8
0100 16
0101 32
0110 64
0111 128
Table continues on the next page...
Memory Map/Register Definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1178 Freescale Semiconductor, Inc.