Information

I2C memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_7008 I2C SMBus Control and Status register (I2C1_SMB) 8 R/W 00h
44.3.9/
1227
4006_7009 I2C Address Register 2 (I2C1_A2) 8 R/W C2h
44.3.10/
1228
4006_700A I2C SCL Low Timeout Register High (I2C1_SLTH) 8 R/W 00h
44.3.11/
1229
4006_700B I2C SCL Low Timeout Register Low (I2C1_SLTL) 8 R/W 00h
44.3.12/
1229
44.3.1 I2C Address Register 1 (I2Cx_A1)
This register contains the slave address to be used by the I2C module.
Addresses: I2C0_A1 is 4006_6000h base + 0h offset = 4006_6000h
I2C1_A1 is 4006_7000h base + 0h offset = 4006_7000h
Bit 7 6 5 4 3 2 1 0
Read
AD[7:1]
0
Write
Reset
0 0 0 0 0 0 0 0
I2Cx_A1 field descriptions
Field Description
7–1
AD[7:1]
Address
Contains the primary slave address used by the I2C module when it is addressed as a slave. This field is
used in the 7-bit address scheme and the lower seven bits in the 10-bit address scheme.
0
Reserved
This read-only field is reserved and always has the value zero.
44.3.2 I2C Frequency Divider register (I2Cx_F)
Addresses: I2C0_F is 4006_6000h base + 1h offset = 4006_6001h
I2C1_F is 4006_7000h base + 1h offset = 4006_7001h
Bit 7 6 5 4 3 2 1 0
Read
MULT ICR
Write
Reset
0 0 0 0 0 0 0 0
Chapter 44 Inter-Integrated Circuit (I2C)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1219