Information

44.3.7 I2C Programmable Input Glitch Filter register (I2Cx_FLT)
Addresses: I2C0_FLT is 4006_6000h base + 6h offset = 4006_6006h
I2C1_FLT is 4006_7000h base + 6h offset = 4006_7006h
Bit 7 6 5 4 3 2 1 0
Read 0 0
FLT
Write
Reset
0 0 0 0 0 0 0 0
I2Cx_FLT field descriptions
Field Description
7
Reserved
This read-only field is reserved and always has the value zero.
6–5
Reserved
This read-only field is reserved and always has the value zero.
4–0
FLT
I2C programmable filter factor
Controls the width of the glitch, in terms of bus clock cycles, that the filter must absorb. For any glitch
whose size is less than or equal to this width setting, the filter does not allow the glitch to pass.
00h No filter/bypass
01-1Fh Filter glitches up to width of n bus clock cycles, where n=1-31d
44.3.8 I2C Range Address register (I2Cx_RA)
Addresses: I2C0_RA is 4006_6000h base + 7h offset = 4006_6007h
I2C1_RA is 4006_7000h base + 7h offset = 4006_7007h
Bit 7 6 5 4 3 2 1 0
Read
RAD
0
Write
Reset
0 0 0 0 0 0 0 0
I2Cx_RA field descriptions
Field Description
7–1
RAD
Range slave address
This field contains the slave address to be used by the I2C module. The field is used in the 7-bit address
scheme. Any nonzero write enables this register. This register's use is similar to that of the A1 register,
but in addition this register can be considered a maximum boundary in range matching mode.
0
Reserved
This read-only field is reserved and always has the value zero.
Memory Map and Register Descriptions
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1226 Freescale Semiconductor, Inc.