Information
UARTx_BDL field descriptions
Field Description
7–0
SBR
UART Baud Rate Bits
The baud rate for the UART is determined by these 13 bits. See Baud rate generation for details
NOTE: The baud rate generator is disabled until the C2[TE] bit or the C2[RE] bit is set for the first time
after reset.The baud rate generator is disabled when SBR = 0.
NOTE: Writing to BDH has no effect without writing to BDL, since writing to BDH puts the data in a
temporary location until BDL is written.
NOTE: When the 1/32 narrow pulse width is selected for infrared (IrDA), the baud rate bits must be
even, the least significant bit is 0. Refer to MODEM register.
45.3.3 UART Control Register 1 (UARTx_C1)
This read/write register controls various optional features of the UART system.
Addresses: UART0_C1 is 4006_A000h base + 2h offset = 4006_A002h
UART1_C1 is 4006_B000h base + 2h offset = 4006_B002h
UART2_C1 is 4006_C000h base + 2h offset = 4006_C002h
UART3_C1 is 4006_D000h base + 2h offset = 4006_D002h
UART4_C1 is 400E_A000h base + 2h offset = 400E_A002h
UART5_C1 is 400E_B000h base + 2h offset = 400E_B002h
Bit 7 6 5 4 3 2 1 0
Read
LOOPS UARTSWAI RSRC M WAKE ILT PE PT
Write
Reset
0 0 0 0 0 0 0 0
UARTx_C1 field descriptions
Field Description
7
LOOPS
Loop Mode Select
When LOOPS is set, the RxD pin is disconnected from the UART and the transmitter output is internally
connected to the receiver input.The transmitter and the receiver must be enabled to use the loop function.
0 Normal operation.
1 Loop mode where transmitter output is internally connected to receiver input. The receiver input is
determined by the RSRC bit.
6
UARTSWAI
UART Stops in Wait Mode
0 UART clock continues to run in wait mode.
1 UART clock freezes while CPU is in wait mode.
5
RSRC
Receiver Source Select
This bit has no meaning or effect unless the LOOPS bit is set. When LOOPS is set, the RSRC bit
determines the source for the receiver shift register input.
Table continues on the next page...
Chapter 45 Universal Asynchronous Receiver/Transmitter (UART)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1263