Information

NOTE
In 8-bit or 9-bit data format, only UART data register (D) needs
to be accessed in order to clear the S1[RDRF] bit (assuming
receiver buffer level is less than RWFIFO[RXWATER]). The
C3 register only needs to be read (prior to the D register) if the
ninth bit of data needs to be captured. Likewise the ED register
only needs to be read (prior to the D register) if the additional
flag data for the dataword needs to be captured.
NOTE
In the normal 8-bit mode (M bit cleared) if the parity is enabled,
you get seven data bits and one parity bit. That one parity bit
will be loaded into the D register. So if you care about only the
data bits, you have to mask off the parity bit from the value you
read out of this register.
NOTE
When transmitting in 9-bit data format and using 8-bit write
instructions, write first to transmit bit 8 in UART control
register 3 (C3[T8]), then D. A write to C3[T8] stores the data in
a temporary register. If D register is written first then the new
data on data bus is stored in D register, while the temporary
value (written by last write to C3[T8]) gets stored in C3[T8]
register.
Addresses: UART0_D is 4006_A000h base + 7h offset = 4006_A007h
UART1_D is 4006_B000h base + 7h offset = 4006_B007h
UART2_D is 4006_C000h base + 7h offset = 4006_C007h
UART3_D is 4006_D000h base + 7h offset = 4006_D007h
UART4_D is 400E_A000h base + 7h offset = 400E_A007h
UART5_D is 400E_B000h base + 7h offset = 400E_B007h
Bit 7 6 5 4 3 2 1 0
Read
RT
Write
Reset
0 0 0 0 0 0 0 0
UARTx_D field descriptions
Field Description
7–0
RT
Reads return the contents of the read-only receive data register and writes go to the write-only transmit
data register.
Memory map and registers
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1274 Freescale Semiconductor, Inc.