Information
UARTx_SFIFO field descriptions (continued)
Field Description
0 No transmit buffer overflow has occurred since the last time the flag was cleared.
1 At least one transmit buffer overflow has occurred since the last time the flag was cleared.
0
RXUF
Receiver Buffer Underflow Flag
This flag indicates that more data has been read from the receive buffer than was present. This bit will
assert regardless of the value of CFIFO[RXUFE]. However, an interrupt will only be issued to the host if
the CFIFO[RXUFE] bit is set. This flag is cleared by writing a "1".
0 No receive buffer underflow has occurred since the last time the flag was cleared.
1 At least one receive buffer underflow has occurred since the last time the flag was cleared.
45.3.19 UART FIFO Transmit Watermark (UARTx_TWFIFO)
This register provides the ability to set a programmable threshold for notification of
needing additional transmit data. This register may be read at any time but should only be
written when C2[TE] is not set. Changing the value of the watermark will not clear the
S1[TDRE] flag.
Addresses: UART0_TWFIFO is 4006_A000h base + 13h offset = 4006_A013h
UART1_TWFIFO is 4006_B000h base + 13h offset = 4006_B013h
UART2_TWFIFO is 4006_C000h base + 13h offset = 4006_C013h
UART3_TWFIFO is 4006_D000h base + 13h offset = 4006_D013h
UART4_TWFIFO is 400E_A000h base + 13h offset = 400E_A013h
UART5_TWFIFO is 400E_B000h base + 13h offset = 400E_B013h
Bit 7 6 5 4 3 2 1 0
Read
TXWATER
Write
Reset
0 0 0 0 0 0 0 0
UARTx_TWFIFO field descriptions
Field Description
7–0
TXWATER
Transmit Watermark
When the number of datawords in the transmit FIFO/buffer is equal to or less than the value in this
register field then an interrupt via S1[TDRE] or a DMA request via C5[TDMAS] will be generated as
determined by C5[TDMAS] and C2[TIE] fields. For proper operation the value in the TXWATER field must
be set to be less than the size of the transmit buffer/FIFO size as indicated by PFIFO[TXFIFOSIZE] and
PFIFO[TXFE].
Chapter 45 Universal Asynchronous Receiver/Transmitter (UART)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1285