Information

UARTx_C7816 field descriptions (continued)
Field Description
When this bit is set, all received characters will be searched for a valid initial character. If an invalid initial
character is identified then a NACK will be sent if ANACK is set. All received data is discarded and error
flags blocked (S1[NF], S1[OR], S1[FE], S1[PF], IS7816[WT], IS7816[CWT], IS7816[BWT], IS7816[GTV])
until a valid initial character is detected. Upon detection of a valid initial character the configuration values
S2[MSBF], C3[TXINV] and S2[RXINV] are automatically updated to reflect the initial character that was
received. The actual INIT data value is not stored in the receive buffer. Additionally, upon detection of a
valid initial character the IS7816[INITD] flag is set and an interrupt issued as programmed by the
IE7816[INITDE] bit. When a valid initial character is detected the INIT bit is automatically cleared.
0 Normal operating mode. Receiver does not seek to identify initial character.
1 Receiver searches for initial character.
1
TTYPE
Transfer Type
This bit indicates the transfer protocol being used.
Refer to ISO-7816 / smartcard support for more details.
0 T = 0 Per the ISO-7816 specification.
1 T = 1 Per the ISO-7816 specification.
0
ISO_7816E
ISO-7816 Functionality Enabled
This bit indicates that the UART is operating according to the ISO-7816 protocol.
NOTE: This bit should only be modified when no transmit or receive is occurring. If this bit is changed
during a data transfer the data being transmitted or received may be transferred incorrectly.
0 ISO-7816 functionality is turned off / not enabled.
1 ISO-7816 functionality is turned on / enabled.
45.3.24 UART 7816 Interrupt Enable Register (UARTx_IE7816)
The IE7816 register controls which flags result in an interrupt being issued. This register
is specific to 7816 functionality, the corresponding flags that drive the interrupts will not
assert when 7816E is not set/enabled. However, these flags may remain set if they
asserted while 7816E was set and not subsequently cleared. This register maybe read or
written at anytime.
Addresses: UART0_IE7816 is 4006_A000h base + 19h offset = 4006_A019h
UART1_IE7816 is 4006_B000h base + 19h offset = 4006_B019h
UART2_IE7816 is 4006_C000h base + 19h offset = 4006_C019h
UART3_IE7816 is 4006_D000h base + 19h offset = 4006_D019h
UART4_IE7816 is 400E_A000h base + 19h offset = 400E_A019h
UART5_IE7816 is 400E_B000h base + 19h offset = 400E_B019h
Bit 7 6 5 4 3 2 1 0
Read
WTE CWTE BWTE INITDE
0
GTVE TXTE RXTE
Write
Reset
0 0 0 0 0 0 0 0
Chapter 45 Universal Asynchronous Receiver/Transmitter (UART)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1289