Information

Address: SDHC_PROCTL is 400B_1000h base + 28h offset = 400B_1028h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
WECRM
WECINS
WECINT
0
IABG
RWCTL
CREQ
SABGREQ
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
DMAS
CDSS
CDTL
EMODE
D3CD
DTW
LCTL
W
Reset
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
SDHC_PROCTL field descriptions
Field Description
31–27
Reserved
This read-only field is reserved and always has the value zero.
26
WECRM
Wakeup Event Enable On SD Card Removal
This bit enables a wakeup event, via IRQSTAT[CRM]. FN_WUS (Wake Up Support) in CIS does not
effect this bit. When this bit is set, the IRQSTAT[CRM] and the SDHC interrupt can be asserted without
SD_CLK toggling. When the wakeup feature is not enabled, the SD_CLK must be active in order to assert
the IRQSTAT[CRM] and the SDHC interrupt.
0b Disabled
1b Enabled
25
WECINS
Wakeup Event Enable On SD Card Insertion
This bit enables a wakeup event, via IRQSTAT[CINS]. FN_WUS (Wake Up Support) in CIS does not
effect this bit. When this bit is set, the IRQSTATEN[CINSEN] and the SDHC interrupt can be asserted
without SD_CLK toggling. When the wakeup feature is not enabled, the SD_CLK must be active in order
to assert the IRQSTATEN[CINSEN] and the SDHC interrupt.
0b Disabled
1b Enabled
24
WECINT
Wakeup Event Enable On Card Interrupt
This bit enables a wakeup event, via IRQSTAT[CINT]. This bit can be set to 1 if FN_WUS (Wake Up
Support) in CIS is set to 1. When this bit is set, the card interrupt status and the SDHC interrupt can be
asserted without SD_CLK toggling. When the wakeup feature is not enabled, the SD_CLK must be active
in order to assert the card interrupt status and the SDHC interrupt.
0b Disabled
1b Enabled
23–20
Reserved
This read-only field is reserved and always has the value zero.
19
IABG
Interrupt At Block Gap
Table continues on the next page...
Chapter 46 Secured digital host controller (SDHC)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1363