Information

SDHC_FEVT field descriptions (continued)
Field Description
Forces the IRQSTAT[DEBE] bit to be set.
21
DCE
Force Event Data CRC Error
Forces the IRQSTAT[DCE] bit to be set.
20
DTOE
Force Event Data Time Out Error
Force the IRQSTAT[DTOE] bit to be set.
19
CIE
Force Event Command Index Error
Forces the IRQSTAT[CCE] bit to be set.
18
CEBE
Force Event Command End Bit Error
Forces the IRQSTAT[CEBE] bit to be set.
17
CCE
Force Event Command CRC Error
Forces the IRQSTAT[CCE] bit to be set.
16
CTOE
Force Event Command Time Out Error
Forces the IRQSTAT[CTOE] bit to be set.
15–8
Reserved
This field is reserved.
7
CNIBAC12E
Force Event Command Not Executed By Auto Command 12 Error
Forces the AC12ERR[CNIBAC12E] bit to be set.
6–5
Reserved
This field is reserved.
4
AC12IE
Force Event Auto Command 12 Index Error
Forces the AC12ERR[AC12IE] bit to be set.
3
AC12EBE
Force Event Auto Command 12 End Bit Error
Forces the AC12ERR[AC12EBE] bit to be set.
2
AC12CE
Force Event Auto Command 12 CRC Error
Forces the AC12ERR[AC12CE] bit to be set.
1
AC12TOE
Force Event Auto Command 12 Time Out Error
Forces the AC12ERR[AC12TOE] bit to be set.
0
AC12NE
Force Event Auto Command 12 Not Executed
Forces the AC12ERR[AC12NE] bit to be set.
Chapter 46 Secured digital host controller (SDHC)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1387