Information

46.4.20 ADMA Error Status Register (SDHC_ADMAES)

When an ADMA error interrupt has occurred, the ADMA error states field in this register

holds the ADMA state and the ADMA system address register holds the address around

the error descriptor.

For recovering from this error, the host driver requires the ADMA state to identify the

error descriptor address as follows:

• ST_STOP: Previous location set in the ADMA System Address register is the error

descriptor address.

• ST_FDS: Current location set in the ADMA System Address register is the error

descriptor address.

• ST_CADR: This state is never set because it only increments the descriptor pointer

and doesn’t generate an ADMA error.

• ST_TFR: Previous location set in the ADMA System Address register is the error

descriptor address.

In case of a write operation, the host driver should use the ACMD22 to get the number of

the written block, rather than using this information, since unwritten data may exist in the

host controller.

The host controller generates the ADMA error interrupt when it detects invalid descriptor

data (valid = 0) in the ST_FDS state. The host driver can distinguish this error by reading

the valid bit of the error descriptor.

Table 46-30. ADMA Error State Coding

D01-D00 ADMA error state (when error has

occurred)

Contents of ADMA system address

00 ST_STOP (Stop DMA) Holds the address of the next

executable descriptor command

01 ST_FDS (fetch descriptor) Holds the valid descriptor address

10 ST_CADR (change address) No ADMA error is generated

11 ST_TFR (Transfer Data) Holds the address of the next

executable descriptor command

Memory map and register definition

K10 Sub-Family Reference Manual, Rev. 6, Nov 2011

1388 Freescale Semiconductor, Inc.