Information

Section Number Title Page
16.2 Memory Map/Register Descriptions.............................................................................................................................339
16.2.1 Crossbar switch (AXBS) slave configuration (MCM_PLASC)..................................................................340
16.2.2 Crossbar switch (AXBS) master configuration (MCM_PLAMC)..............................................................340
16.2.3 SRAM arbitration and protection (MCM_SRAMAP).................................................................................341
16.2.4 Interrupt status register (MCM_ISR)...........................................................................................................342
16.2.5 ETB counter control register (MCM_ETBCC)...........................................................................................343
16.2.6 ETB reload register (MCM_ETBRL)..........................................................................................................344
16.2.7 ETB counter value register (MCM_ETBCNT)...........................................................................................345
16.3 Functional Description..................................................................................................................................................345
16.3.1 Interrupts......................................................................................................................................................345
Chapter 17
Crossbar Switch (AXBS)
17.1 Introduction...................................................................................................................................................................347
17.1.1 Features........................................................................................................................................................347
17.2 Memory Map / Register Definition...............................................................................................................................348
17.2.1 Priority Registers Slave (AXBS_PRSn)......................................................................................................349
17.2.2 Control Register (AXBS_CRSn).................................................................................................................352
17.2.3 Master General Purpose Control Register (AXBS_MGPCRn)...................................................................354
17.3 Functional Description..................................................................................................................................................355
17.3.1 General operation.........................................................................................................................................355
17.3.2 Register coherency.......................................................................................................................................356
17.3.3 Arbitration....................................................................................................................................................356
17.4 Initialization/application information...........................................................................................................................359
Chapter 18
Memory Protection Unit (MPU)
18.1 Introduction...................................................................................................................................................................361
18.2 Overview.......................................................................................................................................................................361
18.2.1 Block Diagram.............................................................................................................................................361
18.2.2 Features........................................................................................................................................................362
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
14 Freescale Semiconductor, Inc.