Information

Source UART 0 UART 1 UART 2 UART 3 UART 4 UART 5
Wait timer
(ISO7816)
x — — — — —
Character wait
timer (ISO7816)
x — — — — —
Block wait timer
(ISO7816)
x — — — — —
Guard time
violation
(ISO7816)
x — — — — —
3.9.5 SDHC Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Crossbar switch
Register
access
Peripheral
bridge
Module signals
SDHC
Transfers
Signal multiplexing
Figure 3-53. SDHC configuration
Table 3-68. Reference links to related information
Topic Related module Reference
Full description SDHC SDHC
System memory map System memory map
Clocking Clock Distribution
Power management Power management
Transfers Crossbar switch Crossbar switch
Signal Multiplexing Port control Signal Multiplexing
3.9.5.1 SDHC clocking
In addition to the system clock, the SDHC needs a clock for the base for the external card
clock. There are four possible clock sources for this clock, selected by the SIM’s SOPT2
register:
Chapter 3 Chip Configuration
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 141