Information

I2Sx_TCCR field descriptions (continued)
Field Description
control the amount of valid data in those 32 bits. In AC97 Mode of operation, if word length is set to any
value other than 16 bits, it will result in a word length of 20 bits.
0000 Reserved. Do not program this value.
0001 Reserved. Do not program this value.
0010 Reserved. Do not program this value.
0011 8
0100 10
0101 12
0110 Reserved. Do not program this value.
0111 16
1000 18
1001 20
1010 22
1011 24
1100 Reserved. Do not program this value.
1101 Reserved. Do not program this value.
1110 Reserved. Do not program this value.
1111 Reserved. Do not program this value.
12–8
DC
Frame Rate Divider Control.
These bits are used to control the divide ratio for the programmable frame rate dividers. The divide ratio
works on the word clock. In Normal mode, this ratio determines the word transfer rate. In Network mode,
this ratio sets the number of words per frame. The divide ratio ranges from 1 to 32 in Normal mode and
from 2 to 32 in Network mode. In Normal mode, a divide ratio of 1 (DC=00000) provides continuous
periodic data word transfer. A bit-length frame sync must be used in this case.
These bits can be programmed with values ranging from "00000" to "11111" to control the number of
words in a frame.
7–0
PM
Prescaler Modulus Select.
These bits control the prescale divider in the clock generator. This prescaler is used only in Internal Clock
mode to divide the internal clock . The bit clock output is available at the clock port. A divide ratio from 1
to 256 (PM[7:0] = 0x00 to 0xFF) can be selected.
Memory map/register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1478 Freescale Semiconductor, Inc.