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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller MAPBGA 144 (13x13) 32-Bit 100 MHz I/O number 104
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I2Sx_FCSR field descriptions (continued)
Field Description
1001 TFE set when there are more than or equal to 9 empty slots in Transmit FIFO. (default) Transmit
FIFO empty is set when TxFIFO ≤ 6 data.
1010 TFE set when there are more than or equal to 10 empty slots in Transmit FIFO. (default) Transmit
FIFO empty is set when TxFIFO ≤ 5 data.
1011 TFE set when there are more than or equal to 11 empty slots in Transmit FIFO. (default) Transmit
FIFO empty is set when TxFIFO ≤ 4 data.
1100 TFE set when there are more than or equal to 12 empty slots in Transmit FIFO. (default) Transmit
FIFO empty is set when TxFIFO ≤ 3 data.
1101 TFE set when there are more than or equal to 13 empty slots in Transmit FIFO. (default) Transmit
FIFO empty is set when TxFIFO ≤ 2 data.
1110 TFE set when there are more than or equal to 14 empty slots in Transmit FIFO. (default) Transmit
FIFO empty is set when TxFIFO ≤ 1 data.
1000 TFE set when there are more than or equal to 15 empty slots in Transmit FIFO. (default) Transmit
FIFO empty is set when TxFIFO ≤ 0 data.
47.3.13 I
2
S AC97 Control Register (I2Sx_ACNT)
Addresses: I2S0_ACNT is 4002_F000h base + 38h offset = 4002_F038h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
FRDIV WR RD TIF FV
AC97EN
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2Sx_ACNT field descriptions
Field Description
31–11
Reserved
This read-only field is reserved and always has the value zero.
10–5
FRDIV
Frame Rate Divider.
These bits control the frequency of AC97 data transmission/reception. They are programmed with the
number of frames for which the I
2
S should be idle, after operating in one frame. Through these bits, AC97
frequency of operation, from 48 KHz (000000) to 1 KHz (101111) can be achieved.
Sample Value: 001010 (10 Decimal) = I
2
S will operate once every 11 frames
4
WR
Write Command.
Table continues on the next page...
Memory map/register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1486 Freescale Semiconductor, Inc.