Information

2. Set all control bits for configuring the I

S (see the following table ).

3. Enable appropriate interrupts/DMA requests through IER.

4. Set the CR[I2SEN] bit to enable the I

5. In AC97 mode, set the ACNT[AC97EN] bit after programming the ATAG register

(if needed, for AC97 Fixed mode).

6. In AC97 fixed mode, do not program the slot request bits without programming the

frame valid bits in ATAG register.

7. In gated clock mode, refer to Table 47-3.

8. Set CR[TE/RE] bits.

To ensure proper operation of the I

S, use the power-on or I

S reset before changing any

of the I

S control bits listed in the following table.

Note

These control bits should not be changed when the I

S module

is enabled

Table 47-56. I

S control bits requiring I

S to be disabled before change

Control Register Bit

CR [9]=CLKIST

[8]=TCHEN

[7]=SYSCLKEN

[6:5]=I2SMODE

[4]=SYN

[3]=NET

IER [22]=RDMAE

[20]=TDMAE

Table continues on the next page...

Initialization/application information

K10 Sub-Family Reference Manual, Rev. 6, Nov 2011

1518 Freescale Semiconductor, Inc.