Information

GPIO memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
reads
zero)
400F_F010 Port Data Input Register (GPIOA_PDIR) 32 R 0000_0000h
48.2.5/
1528
400F_F014 Port Data Direction Register (GPIOA_PDDR) 32 R/W 0000_0000h
48.2.6/
1528
400F_F040 Port Data Output Register (GPIOB_PDOR) 32 R/W 0000_0000h
48.2.1/
1526
400F_F044 Port Set Output Register (GPIOB_PSOR) 32
W
(always
reads
zero)
0000_0000h
48.2.2/
1526
400F_F048 Port Clear Output Register (GPIOB_PCOR) 32
W
(always
reads
zero)
0000_0000h
48.2.3/
1527
400F_F04C Port Toggle Output Register (GPIOB_PTOR) 32
W
(always
reads
zero)
0000_0000h
48.2.4/
1527
400F_F050 Port Data Input Register (GPIOB_PDIR) 32 R 0000_0000h
48.2.5/
1528
400F_F054 Port Data Direction Register (GPIOB_PDDR) 32 R/W 0000_0000h
48.2.6/
1528
400F_F080 Port Data Output Register (GPIOC_PDOR) 32 R/W 0000_0000h
48.2.1/
1526
400F_F084 Port Set Output Register (GPIOC_PSOR) 32
W
(always
reads
zero)
0000_0000h
48.2.2/
1526
400F_F088 Port Clear Output Register (GPIOC_PCOR) 32
W
(always
reads
zero)
0000_0000h
48.2.3/
1527
400F_F08C Port Toggle Output Register (GPIOC_PTOR) 32
W
(always
reads
zero)
0000_0000h
48.2.4/
1527
400F_F090 Port Data Input Register (GPIOC_PDIR) 32 R 0000_0000h
48.2.5/
1528
400F_F094 Port Data Direction Register (GPIOC_PDDR) 32 R/W 0000_0000h
48.2.6/
1528
400F_F0C0 Port Data Output Register (GPIOD_PDOR) 32 R/W 0000_0000h
48.2.1/
1526
Table continues on the next page...
Memory map and register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1524 Freescale Semiconductor, Inc.