Information

4.5.1 Peripheral Bridge 0 (AIPS-Lite 0) Memory Map
Table 4-2. Peripheral bridge 0 slot assignments
System 32-bit base address Slot
number
Module
0x4000_0000 0 Peripheral bridge 0 (AIPS-Lite 0)
0x4000_1000 1
0x4000_2000 2
0x4000_3000 3
0x4000_4000 4 Crossbar switch
0x4000_5000 5
0x4000_6000 6
0x4000_7000 7
0x4000_8000 8 DMA controller
0x4000_9000 9 DMA controller transfer control descriptors
0x4000_A000 10
0x4000_B000 11
0x4000_C000 12 FlexBus
0x4000_D000 13 MPU
0x4000_E000 14
0x4000_F000 15
0x4001_0000 16
0x4001_1000 17
0x4001_2000 18
0x4001_3000 19
0x4001_4000 20
0x4001_5000 21
0x4001_6000 22
0x4001_7000 23
0x4001_8000 24
0x4001_9000 25
0x4001_A000 26
0x4001_B000 27
0x4001_C000 28
0x4001_D000 29
0x4001_E000 30
0x4001_F000 31 Flash memory controller
0x4002_0000 32 Flash memory
Table continues on the next page...
Peripheral bridge (AIPS-Lite0 and AIPS-Lite1) memory maps
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
154 Freescale Semiconductor, Inc.