Information

TSIx_PEN field descriptions (continued)
Field Description
8
PEN8
TSI pin 8 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
7
PEN7
TSI pin 7 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
6
PEN6
TSI pin 6 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
5
PEN5
TSI pin 5 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
4
PEN4
TSI pin 4 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
3
PEN3
TSI pin 3 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
2
PEN2
TSI pin 2 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
1
PEN1
TSI pin 1 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
0
PEN0
TSI pin 0 enable
0 The corresponding pin is not used by TSI
1 The corresponding pin is used by TSI
Memory map and register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1546 Freescale Semiconductor, Inc.