Information

TSIx_STATUS field descriptions (continued)
Field Description
This bit indicates when the corresponding electrode is out of range. If the GENCS[TSIIE] bit is set and the
GENCS[ESOR] bit is cleared, an out-of-range interrupt is generated. Write a one to clear this bit.
1
ORNGF1
Touch Sensing Electrode Out-of-Range Flag 1
0
ORNGF0
Touch Sensing Electrode Out-of-Range Flag 0
This bit indicates when the corresponding electrode is out of range. If the GENCS[TSIIE] bit is set and the
GENCS[ESOR] bit is cleared, an out-of-range interrupt is generated. Write a one to clear this bit.
49.6.5 Counter Register (TSIx_CNTR)
Addresses: TSI0_CNTR1 is 4004_5000h base + 100h offset = 4004_5100h
TSI0_CNTR3 is 4004_5000h base + 104h offset = 4004_5104h
TSI0_CNTR5 is 4004_5000h base + 108h offset = 4004_5108h
TSI0_CNTR7 is 4004_5000h base + 10Ch offset = 4004_510Ch
TSI0_CNTR9 is 4004_5000h base + 110h offset = 4004_5110h
TSI0_CNTR11 is 4004_5000h base + 114h offset = 4004_5114h
TSI0_CNTR13 is 4004_5000h base + 118h offset = 4004_5118h
TSI0_CNTR15 is 4004_5000h base + 11Ch offset = 4004_511Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
CTN CTN1
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
TSIx_CNTRn field descriptions
Field Description
31–16
CTN
TouchSensing channel n counter value
15–0
CTN1
TouchSensing channel n-1 counter value
Memory map and register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
1550 Freescale Semiconductor, Inc.