Information
Table 4-2. Peripheral bridge 0 slot assignments (continued)
System 32-bit base address Slot
number
Module
0x4004_3000 67 —
0x4004_4000 68 —
0x4004_5000 69 Touch sense interface (TSI)
0x4004_6000 70 —
0x4004_7000 71 SIM low-power logic
0x4004_8000 72 System integration module (SIM)
0x4004_9000 73 Port A multiplexing control
0x4004_A000 74 Port B multiplexing control
0x4004_B000 75 Port C multiplexing control
0x4004_C000 76 Port D multiplexing control
0x4004_D000 77 Port E multiplexing control
0x4004_E000 78 —
0x4004_F000 79 —
0x4005_0000 80 —
0x4005_1000 81 —
0x4005_2000 82 Software watchdog
0x4005_3000 83 —
0x4005_4000 84 —
0x4005_5000 85 —
0x4005_6000 86 —
0x4005_7000 87 —
0x4005_8000 88 —
0x4005_9000 89 —
0x4005_A000 90 —
0x4005_B000 91 —
0x4005_C000 92 —
0x4005_D000 93 —
0x4005_E000 94 —
0x4005_F000 95 —
0x4006_0000 96 —
0x4006_1000 97 External watchdog
0x4006_2000 98 Carrier modulator timer (CMT)
0x4006_3000 99 —
0x4006_4000 100 Multi-purpose Clock Generator (MCG)
Table continues on the next page...
Peripheral bridge (AIPS-Lite0 and AIPS-Lite1) memory maps
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
156 Freescale Semiconductor, Inc.
