Information

• powered = Memory is powered to retain contents.
• low power = Flash has a low power state that retains configuration registers to
support faster wakeup.
• OFF = Modules are powered off; module is in reset state upon wakeup.
• wakeup = Modules can serve as a wakeup source for the chip.
Table 7-2. Module operation in low power modes
Modules Stop VLPR VLPW VLPS LLS VLLSx
Core modules
NVIC static FF FF static static OFF
System modules
Mode Controller FF FF FF FF FF FF
LLWU
1
static static static static FF FF
Regulator ON low power low power low power low power low power
LVD ON disabled disabled disabled disabled disabled
Brown-out
Detection
ON ON ON ON ON ON
DMA static FF FF static static OFF
Watchdog FF FF FF FF static OFF
EWM static FF static static static OFF
Clocks
1kHz LPO ON ON ON ON ON ON
System
oscillator (OSC)
OSCERCLK
optional
OSCERCLK
max of 4MHz
crystal
OSCERCLK
max of 4MHz
crystal
OSCERCLK
max of 4MHz
crystal
limited to low
range/low
power
limited to low
range/low
power
MCG static -
MCGIRCLK
optional; PLL
optionally on
but gated
2 MHz IRC 2 MHz IRC static - no clock
output
static - no clock
output
OFF
Core clock OFF 2 MHz max OFF OFF OFF OFF
System clock OFF 2 MHz max 2 MHz max OFF OFF OFF
Bus clock OFF 2 MHz max 2 MHz max OFF OFF OFF
Memory and memory interfaces
Flash powered 1 MHz max
access - no
pgm
low power low power OFF OFF
Portion of
SRAM_U
2
low power low power low power low power low power low power in
VLLS3,2
Remaining
SRAM_U and
all of SRAM_L
low power low power low power low power low power low power in
VLLS3
Table continues on the next page...
Module Operation in Low Power Modes
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
192 Freescale Semiconductor, Inc.