Information

1 2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
G
H
J
A
B
C
D
E
F
G
H
J
10
K
K
10
11
11
LL
12
12
M
M
PTA18
PTC8 PTC4 NC PTC3 PTC2
PTA1 PTA6PTA0PTE27
ADC0_SE16/
CMP1_IN2/
ADC0_SE21
ADC1_SE16/
CMP2_IN2/
ADC0_SE22
PTE26 PTE25 PTA2 PTA3 PTA8
PTA7
VSSVSSVSSAVDDAPTE28VSSPTE17
ADC0_DM1
ADC1_DM1
PGA0_DM/
ADC0_DM0/
ADC1_DM3
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
DAC1_OUT/
CMP2_IN3/
ADC1_SE23
RESERVED VBAT PTA4 PTA9 PTA11
PTA12
PTA13
PTB1
PTA27
PTB0
PTB4PTB5VSSVSSVREFLVREFHPTE11PTE12PTE19PTE18
PTE16
ADC0_DP1
ADC1_DP1
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
PTE24 NC EXTAL32 XTAL32 PTA5 PTA10 VSS
PTA16
PTA14
PTB3
PTA29
PTA26
PTA17
PTA15
PTA19
RESET_b
PTA24
PTA25
PTA28
PTB2
PTB6PTB7PTB8PTB9VDD
VDD PTB17 PTB16 PTB10PTB11
PTB19 PTB18
PTB22PTB23NC
PTB20PTB21PTC5
PTD8PTC6
PTC7 PTD9 NC PTC1 PTC0
VSS VSS
VDDVDD
PTC13 PTC9
PTC11
PTC10
PTC19 PTC15
PTC14PTC18PTD2
PTD3PTD10
PTD13
PTE0 PTD1 PTC17
VDD
VDDPTE7
PTE3PTE4
PTE8PTE9PTE10
PTE6 PTE5
PTE1PTE2
PTD15 PTD14
PTD11PTD12
PTC12PTC16PTD0PTD4PTD5PTD6PTD7
Figure 10-3. K10 144 MAPBGA Pinout Diagram
10.4 Module Signal Description Tables
The following sections correlate the chip-level signal name with the signal name used in
the module's chapter. They also briefly describe the signal function and direction.
Chapter 10 Signal Multiplexing and Signal Descriptions
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 225