Information

Table 10-16. DAC 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
DAC0_OUT — DAC output O
Table 10-17. DAC 1 Signal Descriptions
Chip signal name Module signal
name
Description I/O
DAC1_OUT — DAC output O
Table 10-18. TRIAMP 1 Signal Descriptions
Chip signal name Module signal
name
Description I/O
TRI1_DP inp_3v Amplifier positive input terminal I
TRI1_DM inn_3v Amplifier negative input terminal I
TRI1_OUT out_3v Amplifier output terminal O
Table 10-19. VREF Signal Descriptions
Chip signal name Module signal
name
Description I/O
VREF_OUT VREF_OUT Internally-generated Voltage Reference output O
10.4.6 Communication Interfaces
Table 10-20. CAN 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
CAN0_RX CAN Rx CAN Receive Pin Input
CAN0_TX CAN Tx CAN Transmit Pin Output
Table 10-21. CAN 1 Signal Descriptions
Chip signal name Module signal
name
Description I/O
CAN1_RX CAN Rx CAN Receive Pin Input
CAN1_TX CAN Tx CAN Transmit Pin Output
Module Signal Description Tables
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
230 Freescale Semiconductor, Inc.