Information

Section Number Title Page
28.4.9 Flash Program and Erase..............................................................................................................................635
28.4.10 FTFL Command Operations........................................................................................................................635
28.4.11 Margin Read Commands.............................................................................................................................644
28.4.12 FTFL Command Description.......................................................................................................................645
28.4.13 Security........................................................................................................................................................673
28.4.14 Reset Sequence............................................................................................................................................675
Chapter 29
External Bus Interface (FlexBus)
29.1 Introduction...................................................................................................................................................................677
29.1.1 Overview......................................................................................................................................................677
29.1.2 Features........................................................................................................................................................677
29.1.3 Modes of Operation.....................................................................................................................................678
29.2 Signal Descriptions.......................................................................................................................................................678
29.2.1 Address and Data Buses (FB_An, FB_Dn, FB_ADn).................................................................................679
29.2.2 Chip Selects (FB_CS[5 :0]).........................................................................................................................679
29.2.3 Byte Enables (FB_BE_31_24, FB_BE_23_16, FB_BE_15_8, FB_BE_7_0).............................................680
29.2.4 Output Enable (FB_OE)...............................................................................................................................680
29.2.5 Read/Write (FB_R/W).................................................................................................................................680
29.2.6 Transfer Start/Address Latch Enable (FB_TS/FB_ALE)............................................................................680
29.2.7 Transfer Size (FB_TSIZ[1:0]).....................................................................................................................681
29.2.8 Transfer Burst (FB_TBST)..........................................................................................................................681
29.2.9 Transfer Acknowledge (FB_TA).................................................................................................................682
29.3 Memory Map/Register Definition.................................................................................................................................682
29.3.1 Chip select address register (FB_CSARn)...................................................................................................684
29.3.2 Chip select mask register (FB_CSMRn)......................................................................................................685
29.3.3 Chip select control register (FB_CSCRn)....................................................................................................686
29.3.4 Chip select port multiplexing control register (FB_CSPMCR)...................................................................689
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
24 Freescale Semiconductor, Inc.