Information
PORT memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4004_A070 Pin Control Register n (PORTB_PCR28) 32 R/W 0000_0000h 11.4.1/244
4004_A074 Pin Control Register n (PORTB_PCR29) 32 R/W 0000_0000h 11.4.1/244
4004_A078 Pin Control Register n (PORTB_PCR30) 32 R/W 0000_0000h 11.4.1/244
4004_A07C Pin Control Register n (PORTB_PCR31) 32 R/W 0000_0000h 11.4.1/244
4004_A080 Global Pin Control Low Register (PORTB_GPCLR) 32
W
(always
reads
zero)
0000_0000h 11.4.2/246
4004_A084 Global Pin Control High Register (PORTB_GPCHR) 32
W
(always
reads
zero)
0000_0000h 11.4.3/247
4004_A0A0 Interrupt Status Flag Register (PORTB_ISFR) 32 w1c 0000_0000h 11.4.4/247
4004_A0C0 Digital Filter Enable Register (PORTB_DFER) 32 R/W 0000_0000h 11.4.5/248
4004_A0C4 Digital Filter Clock Register (PORTB_DFCR) 32 R/W 0000_0000h 11.4.6/249
4004_A0C8 Digital Filter Width Register (PORTB_DFWR) 32 R/W 0000_0000h 11.4.7/249
4004_B000 Pin Control Register n (PORTC_PCR0) 32 R/W 0000_0000h 11.4.1/244
4004_B004 Pin Control Register n (PORTC_PCR1) 32 R/W 0000_0000h 11.4.1/244
4004_B008 Pin Control Register n (PORTC_PCR2) 32 R/W 0000_0000h 11.4.1/244
4004_B00C Pin Control Register n (PORTC_PCR3) 32 R/W 0000_0000h 11.4.1/244
4004_B010 Pin Control Register n (PORTC_PCR4) 32 R/W 0000_0000h 11.4.1/244
4004_B014 Pin Control Register n (PORTC_PCR5) 32 R/W 0000_0000h 11.4.1/244
4004_B018 Pin Control Register n (PORTC_PCR6) 32 R/W 0000_0000h 11.4.1/244
4004_B01C Pin Control Register n (PORTC_PCR7) 32 R/W 0000_0000h 11.4.1/244
4004_B020 Pin Control Register n (PORTC_PCR8) 32 R/W 0000_0000h 11.4.1/244
4004_B024 Pin Control Register n (PORTC_PCR9) 32 R/W 0000_0000h 11.4.1/244
4004_B028 Pin Control Register n (PORTC_PCR10) 32 R/W 0000_0000h 11.4.1/244
4004_B02C Pin Control Register n (PORTC_PCR11) 32 R/W 0000_0000h 11.4.1/244
4004_B030 Pin Control Register n (PORTC_PCR12) 32 R/W 0000_0000h 11.4.1/244
4004_B034 Pin Control Register n (PORTC_PCR13) 32 R/W 0000_0000h 11.4.1/244
4004_B038 Pin Control Register n (PORTC_PCR14) 32 R/W 0000_0000h 11.4.1/244
4004_B03C Pin Control Register n (PORTC_PCR15) 32 R/W 0000_0000h 11.4.1/244
4004_B040 Pin Control Register n (PORTC_PCR16) 32 R/W 0000_0000h 11.4.1/244
4004_B044 Pin Control Register n (PORTC_PCR17) 32 R/W 0000_0000h 11.4.1/244
4004_B048 Pin Control Register n (PORTC_PCR18) 32 R/W 0000_0000h 11.4.1/244
4004_B04C Pin Control Register n (PORTC_PCR19) 32 R/W 0000_0000h 11.4.1/244
Table continues on the next page...
Memory map and register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
240 Freescale Semiconductor, Inc.
