Information

Chapter 12
System integration module (SIM)
12.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
The system integration module (SIM) provides system control and chip configuration
registers.
12.1.1 Features
• Configuration for system clocking
• Clock source selection for SDHC, I
2
S, and PLL/FLL source
• System clock divide values
• I
2
S clock divide values
• Architectural clock gating control
• Flash configuration
• RAM size configuration
• Flextimer external clock and fault source selection
• UART0 and UART1 receive/transmit source selection/configuration
• Reset pin filtering
12.1.2 Modes of operation
• Run mode
• Sleep mode
• Deep sleep mode
• VLLS mode
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 253