Information

12.2.1 System Options Register 1 (SIM_SOPT1)
The reset value of the SOPT1 register is as follows: Exit from POR and LVD:
OSC32KSEL is cleared. Exit from VLLS or other system reset: OSC32KSEL are
unaffected
Address: SIM_SOPT1 is 4004_7000h base + 0h offset = 4004_7000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
Reserved
0 MS 0
OSC32KSEL
0
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RAMSIZE 0
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
SIM_SOPT1 field descriptions
Field Description
31–30
Reserved
This read-only field is reserved and always has the value zero.
29–27
Reserved
This field is reserved.
26–24
Reserved
This read-only field is reserved and always has the value zero.
23
MS
EzPort chip select pin state
Reflects the state of the EzPort chip select (EZP_CS) pin during the last reset. This bit is read-only.
22–20
Reserved
This read-only field is reserved and always has the value zero.
19
OSC32KSEL
32K oscillator clock select
Selects the 32 kHz clock source (ERCLK32K) for TSI and LPTMR. This bit is reset only for POR/LVD.
0 System oscillator (OSC32KCLK)
1 RTC oscillator
18–16
Reserved
This read-only field is reserved and always has the value zero.
Table continues on the next page...
Memory map and register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
256 Freescale Semiconductor, Inc.