Information

SIM_SCGC6 field descriptions (continued)
Field Description
0 Clock disabled
1 Clock enabled
14
Reserved
This read-only field is reserved and always has the value zero.
13
SPI1
SPI1 Clock Gate Control
This bit controls the clock gate to the SPI1 module.
0 Clock disabled
1 Clock enabled
12
SPI0
SPI0 Clock Gate Control
This bit controls the clock gate to the SPI0 module.
0 Clock disabled
1 Clock enabled
11–5
Reserved
This read-only field is reserved and always has the value zero.
4
FLEXCAN0
FlexCAN0 Clock Gate Control
This bit controls the clock gate to the FlexCAN0 module.
0 Clock disabled
1 Clock enabled
3–2
Reserved
This read-only field is reserved and always has the value zero.
1
DMAMUX
DMA Mux Clock Gate Control
This bit controls the clock gate to the DMA Mux module.
0 Clock disabled
1 Clock enabled
0
FTFL
Flash Memory Clock Gate Control
This bit controls the clock gate to the flash memory.
0 Clock disabled
1 Clock enabled
Chapter 12 System integration module (SIM)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 277