Information

12.2.18 Flash Configuration Register 2 (SIM_FCFG2)
Address: SIM_FCFG2 is 4004_7000h base + 1050h offset = 4004_8050h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
SWAPPFLSH
0 MAXADDR0
PFLSH
0 MAXADDR1
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
SIM_FCFG2 field descriptions
Field Description
31
SWAPPFLSH
Swap program flash
For devices without FlexNVM: Indicates that swap is active.
0 Swap is not active.
1 Swap is active.
30
Reserved
This read-only field is reserved and always has the value zero.
29–24
MAXADDR0
Max address block 0
This field concatenated with 13 zeros indicates the first invalid address of flash block 0 (program flash 0).
For example, if MAXADDR0 = 0x20 the first invalid address of flash block 0 is 0x0004_0000. This would
be the MAXADDR0 value for a device with 256 KB program flash in flash block 0.
23
PFLSH
Program flash
For devices with FlexNVM: Indicates whether block 1 is program flash or FlexNVM.
Table continues on the next page...
Memory map and register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
284 Freescale Semiconductor, Inc.