Information

Section Number Title Page
33.8 CMP Functional Description........................................................................................................................................815
33.8.1 CMP Functional Modes...............................................................................................................................816
33.8.2 Power Modes................................................................................................................................................825
33.8.3 Startup and Operation..................................................................................................................................826
33.8.4 Low Pass Filter.............................................................................................................................................827
33.9 CMP Interrupts..............................................................................................................................................................829
33.10 CMP DMA Support......................................................................................................................................................829
33.11 Digital to Analog Converter Block Diagram................................................................................................................829
33.12 DAC Functional Description........................................................................................................................................830
33.12.1 Voltage Reference Source Select.................................................................................................................830
33.13 DAC Resets...................................................................................................................................................................830
33.14 DAC Clocks..................................................................................................................................................................830
33.15 DAC Interrupts..............................................................................................................................................................831
Chapter 34
12-bit Digital-to-Analog Converter (DAC)
34.1 Introduction...................................................................................................................................................................833
34.2 Features.........................................................................................................................................................................833
34.3 Block Diagram..............................................................................................................................................................833
34.4 Memory Map/Register Definition.................................................................................................................................834
34.4.1 DAC Data Low Register (DACx_DATnL).................................................................................................838
34.4.2 DAC Data High Register (DACx_DATnH)................................................................................................839
34.4.3 DAC Status Register (DACx_SR)...............................................................................................................839
34.4.4 DAC Control Register (DACx_C0).............................................................................................................840
34.4.5 DAC Control Register 1 (DACx_C1)..........................................................................................................841
34.4.6 DAC Control Register 2 (DACx_C2)..........................................................................................................842
34.5 Functional Description..................................................................................................................................................842
34.5.1 DAC Data Buffer Operation........................................................................................................................843
34.5.2 DMA Operation...........................................................................................................................................844
34.5.3 Resets...........................................................................................................................................................844
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 29