Information

Address: MC_PMCTRL is 4007_E000h base + 3h offset = 4007_E003h
Bit 7 6 5 4 3 2 1 0
Read
LPWUI RUNM
0
LPLLSM
Write
Reset
0 0 0 0 0 0 0 0
MC_PMCTRL field descriptions
Field Description
7
LPWUI
Low Power Wake Up on Interrupt
Controls if the voltage regulator exits stop regulation when any active MCU interrupt occurs, returning the
MCU to normal run mode.
0 The voltage regulator remains in stop regulation on an interrupt
1 The voltage regulator exits stop regulation on an interrupt
6–5
RUNM
Run Mode Enable
This field is used to enter very low power run. Writes to this field are blocked if the protection level has not
been enabled using PMPROT register. This field is cleared by hardware on exit from LLS or VLLS modes.
00 Normal run mode
01 Reserved
10 Very low power run mode
11 Reserved
4–3
Reserved
This read-only field is reserved and always has the value zero.
2–0
LPLLSM
Low Power, Low Leakage Stop Mode
Select low power or low leakage stop modes provided the PMPROT was set properly and stop mode
entry via the sleep-now or sleep-on-exit. After any system reset, writes to reconfigure PMPROT clears
LPLLSM.
000 Normal stop
001 Reserved
010 Very low power stop (VLPS)
011 Low leakage stop (LLS)
100 Reserved
101 Very low leakage stop 3 (VLLS3)
110 Very low leakage stop 2 (VLLS2)
111 Very low leakage stop 1 (VLLS1)
Chapter 13 Mode Controller
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 309