Information

Section Number Title Page
37.4.27 Intermediate Load........................................................................................................................................1005
37.4.28 Global Time Base (GTB).............................................................................................................................1007
37.5 Reset Overview.............................................................................................................................................................1008
37.6 FTM Interrupts..............................................................................................................................................................1010
37.6.1 Timer Overflow Interrupt.............................................................................................................................1010
37.6.2 Channel (n) Interrupt....................................................................................................................................1010
37.6.3 Fault Interrupt..............................................................................................................................................1010
Chapter 38
Periodic Interrupt Timer (PIT)
38.1 Introduction...................................................................................................................................................................1013
38.1.1 Block Diagram.............................................................................................................................................1013
38.1.2 Features........................................................................................................................................................1014
38.2 Signal Description.........................................................................................................................................................1014
38.3 Memory Map/Register Description..............................................................................................................................1015
38.3.1 PIT Module Control Register (PIT_MCR)..................................................................................................1016
38.3.2 Timer Load Value Register (PIT_LDVALn)...............................................................................................1017
38.3.3 Current Timer Value Register (PIT_CVALn).............................................................................................1017
38.3.4 Timer Control Register (PIT_TCTRLn)......................................................................................................1018
38.3.5 Timer Flag Register (PIT_TFLGn)..............................................................................................................1018
38.4 Functional Description..................................................................................................................................................1019
38.4.1 General.........................................................................................................................................................1019
38.4.2 Interrupts......................................................................................................................................................1020
38.5 Initialization and Application Information...................................................................................................................1021
Chapter 39
Low power timer (LPTMR)
39.1 Introduction...................................................................................................................................................................1023
39.1.1 Features........................................................................................................................................................1023
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
34 Freescale Semiconductor, Inc.