Information

MCM_ISR field descriptions (continued)
Field Description
2
NMI
Non-maskable interrupt pending
If ETBCC[RSPT] is set to 10b, this bit is set when the ETB counter expires.
0 No pending NMI
1 Due to the ETB counter expiring, an NMI is pending
1
IRQ
Normal interrupt pending
If ETBCC[RSPT] is set to 01b, this bit is set when the ETB counter expires.
0 No pending interrupt
1 Due to the ETB counter expiring, a normal interrupt is pending
0
Reserved
This read-only field is reserved and always has the value zero.
16.2.5 ETB counter control register (MCM_ETBCC)
Address: MCM_ETBCC is E008_0000h base + 14h offset = E008_0014h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
ITDIS
ETDIS
RLRQ
RSPT
CNTEN
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MCM_ETBCC field descriptions
Field Description
31–6
Reserved
This read-only field is reserved and always has the value zero.
5
ITDIS
ITM-to-TPIU disable
Disables the trace path from ITM to TPIU
0 ITM-to-TPIU trace path enabled
1 ITM-to-TPIU trace path disabled
4
ETDIS
ETM-to-TPIU disable
Disables the trace path from ETM to TPIU
0 ETM-to-TPIU trace path enabled
1 ETM-to-TPIU trace path disabled
3
RLRQ
Reload request
Reloads the ETB packet counter with the MCM_ETBRL RELOAD value.
If IRQ or NMI interrupts were enabled and an NMI or IRQ interrupt was generated on counter expiration,
setting this bit clears the pending NMI or IRQ interrupt request.
Table continues on the next page...
Chapter 16 Miscellaneous Control Module (MCM)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 343