Information

16.2.7 ETB counter value register (MCM_ETBCNT)
Address: MCM_ETBCNT is E008_0000h base + 1Ch offset = E008_001Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 COUNTER
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MCM_ETBCNT field descriptions
Field Description
31–11
Reserved
This read-only field is reserved and always has the value zero.
10–0
COUNTER
Byte count counter value
Indicates the current 0-mod-4 value of the counter.
16.3 Functional Description
This section describes the functional description of MCM module.
16.3.1 Interrupts
The MCM generates two interrupt requests:
• Non-maskable interrupt
• Normal interrupt
16.3.1.1 Non-maskable interrupt
The MCM's non-maskable interrupt (NMI) is generated, if:
• MCM_ISCR[ETBN] is set, which is caused by
• The ETB counter is enabled (MCM_ETBCC[CNTEN] = 1),
• The ETB count expires, and
• The response to counter expiration is an NMI (MCM_ETBCC[RSPT] = 10)
Chapter 16 Miscellaneous Control Module (MCM)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 345