Information

Chapter 17
Crossbar Switch (AXBS)
17.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
This chapter provides information on the layout, configuration, and programming of the
crossbar switch. The crossbar switch connects bus masters and bus slaves using a
crossbar switch structure. This structure allows all bus masters to access different bus
slaves simultaneously, while providing arbitration among the bus masters when they
access the same slave. A variety of bus arbitration methods and attributes may be
programmed on a slave by slave basis.
17.1.1 Features
The crossbar switch includes these distinctive features:
• Symmetric crossbar bus switch implementation
• Allows concurrent accesses from different masters to different slaves
• Slave arbitration attributes configured on a slave by slave basis
• 32-bit width and support for byte, 2-byte, 4-byte, and 16-byte burst transfers
• Operation at a 1-to-1 clock frequency with the bus masters
• Low-Power Park mode support
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 347