Information

18.3.8 Region Descriptor Alternate Access Control n
(MPU_RGDAACn)
Since software may adjust only the access controls within a region descriptor
(RGDn_WORD2) as different tasks execute, an alternate programming view of this 32-
bit entity is available. Writing to this register does not affect the descriptor’s valid bit.
Addresses: 4000_D000h base + 800h offset + (4d × n), where n = 0d to 11d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
M7RE
M7WE
M6RE
M6WE
M5RE
M5WE
M4RE
M4WE
Reserved
M3SM M3UM
Reserved
M2SM
[-14:1]
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
M2SM
[bit 0]
M2UM
Reserved
M1SM M1UM
Reserved
M0SM M0UM
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MPU_RGDAACn field descriptions
Field Description
31
M7RE
Bus master 7 read enable.
0 Bus master 7 reads terminate with an access error and the read is not performed
1 Bus master 7 reads allowed
30
M7WE
Bus master 7 write enable
0 Bus master 7 writes terminate with an access error and the write is not performed
1 Bus master 7 writes allowed
29
M6RE
Bus master 6 read enable.
0 Bus master 6 reads terminate with an access error and the read is not performed
1 Bus master 6 reads allowed
28
M6WE
Bus master 6 write enable
0 Bus master 6 writes terminate with an access error and the write is not performed
1 Bus master 6 writes allowed
27
M5RE
Bus master 5 read enable.
0 Bus master 5 reads terminate with an access error and the read is not performed
1 Bus master 5 reads allowed
26
M5WE
Bus master 5 write enable
Table continues on the next page...
Chapter 18 Memory Protection Unit (MPU)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 375