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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller MAPBGA 144 (13x13) 32-Bit 100 MHz I/O number 104

Section Number Title Page

45.4.4 Data format (non ISO-7816)........................................................................................................................1319

45.4.5 Single-wire operation...................................................................................................................................1322

45.4.6 Loop operation.............................................................................................................................................1323

45.4.7 ISO-7816 / smartcard support......................................................................................................................1323

45.4.8 Infrared interface..........................................................................................................................................1328

45.5 Reset..............................................................................................................................................................................1329

45.6 System level interrupt sources......................................................................................................................................1329

45.6.1 RXEDGIF description..................................................................................................................................1330

45.7 DMA operation.............................................................................................................................................................1331

45.8 Application information................................................................................................................................................1331

45.8.1 Transmit/receive data buffer operation........................................................................................................1331

45.8.2 ISO-7816 initialization sequence.................................................................................................................1332

45.8.3 Initialization sequence (non ISO-7816).......................................................................................................1334

45.8.4 Overrun (OR) flag implications...................................................................................................................1335

45.8.5 Overrun NACK considerations....................................................................................................................1336

45.8.6 Match address registers................................................................................................................................1337

45.8.7 Modem feature.............................................................................................................................................1337

45.8.8 IrDA minimum pulse width.........................................................................................................................1338

45.8.9 Clearing 7816 wait timer (WT, BWT, CWT) interrupts..............................................................................1338

45.8.10 Legacy and reverse compatibility considerations........................................................................................1339

Chapter 46

Secured digital host controller (SDHC)

46.1 Introduction...................................................................................................................................................................1341

46.2 Overview.......................................................................................................................................................................1341

46.2.1 Supported types of cards..............................................................................................................................1341

46.2.2 SDHC block diagram...................................................................................................................................1342

46.2.3 Features........................................................................................................................................................1343

46.2.4 Modes and operations..................................................................................................................................1344

46.3 SDHC signal descriptions.............................................................................................................................................1345

K10 Sub-Family Reference Manual, Rev. 6, Nov 2011

Freescale Semiconductor, Inc. 43