Information
21.3.14 Error Register (DMA_ERR)
The ERR provides a bit map for the 16 channels, signaling the presence of an error for
each channel. The eDMA engine signals the occurrence of an error condition by setting
the appropriate bit in this register. The outputs of this register are enabled by the contents
of the EEI, and then routed to the interrupt controller. During the execution of the
interrupt-service routine associated with any DMA errors, it is software’s responsibility
to clear the appropriate bit, negating the error-interrupt request. Typically, a write to the
CERR in the interrupt-service routine is used for this purpose. The normal DMA channel
completion indicators (setting the transfer control descriptor DONE flag and the possible
assertion of an interrupt request) are not affected when an error is detected.
The contents of this register can also be polled because a non-zero value indicates the
presence of a channel error regardless of the state of the EEI. The state of any given
channel’s error indicators is affected by writes to this register; it is also affected by writes
to the CERR. On writes to the ERR, a one in any bit position clears the corresponding
channel’s error status. A zero in any bit position has no affect on the corresponding
channel’s current error status. The CERR is provided so the error indicator for a single
channel can easily be cleared.
Address: DMA_ERR is 4000_8000h base + 2Ch offset = 4000_802Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
ERR15
ERR14
ERR13
ERR12
ERR11
ERR10
ERR9
ERR8
ERR7
ERR6
ERR5
ERR4
ERR3
ERR2
ERR1
ERR0
W
w1c w1c w1c w1c w1c w1c
w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DMA_ERR field descriptions
Field Description
31–16
Reserved
This read-only field is reserved and always has the value zero.
Table continues on the next page...
Memory map/register definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
450 Freescale Semiconductor, Inc.