Information

DMA_TCDn_DADDR field descriptions
Field Description
31–0
DADDR
Destination Address
Memory address pointing to the destination data.
21.3.25 TCD Signed Destination Address Offset (DMA_TCD_DOFF)
Addresses: 4000_8000h base + 1014h offset + (32d × n), where n = 0d to 15d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
DOFF
Write
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
DMA_TCDn_DOFF field descriptions
Field Description
15–0
DOFF
Destination Address Signed offset
Sign-extended offset applied to the current destination address to form the next-state value as each
destination write is completed.
21.3.26 TCD Current Minor Loop Link, Major Loop Count (Channel
Linking Enabled) (DMA_TCD_CITER_ELINKYES)
If TCDn_CITER[ELINK] is set, the TCDn_CITER register is defined as follows.
Addresses: 4000_8000h base + 1016h offset + (32d × n), where n = 0d to 15d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
ELINK
0
LINKCH CITER
Write
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
Chapter 21 Direct Memory Access Controller (eDMA)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 461