Information

22.2 EWM Signal Descriptions
The EWM has two external signals, as shown in the following table.
Table 22-1. EWM Signal Descriptions
Signal Description I/O
EWM_in EWM input for safety status of external safety circuits. The polarity of
EWM_in is programmable using the CTRL[ASSIN] bit. The default polarity
is active-low.
I
EWM_out EWM reset out signal O
22.3 Memory Map/Register Definition
This section contains the module memory map and registers.
EWM memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_1000 Control Register (EWM_CTRL) 8 R/W 00h 22.3.1/492
4006_1001 Service Register (EWM_SERV) 8
W
(always
reads
zero)
00h 22.3.2/493
4006_1002 Compare Low Register (EWM_CMPL) 8 R/W 00h 22.3.3/494
4006_1003 Compare High Register (EWM_CMPH) 8 R/W FFh 22.3.4/494
22.3.1 Control Register (EWM_CTRL)
The CTRL register is cleared by any reset.
NOTE
This register can be written only once after a CPU reset.
Writing this register more than once, generates a bus transfer
error.
EWM Signal Descriptions
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
492 Freescale Semiconductor, Inc.